Verdict: Micron Technology has selected Larsen & Toubro (L&T) as the general contractor for phase two of its $2.75 billion semiconductor Assembly, Testing, Marking, and Packaging (ATMP) facility in Sanand, Gujarat. The switch—replacing Tata Projects, which built phase one—follows operational delays and friction between the two sides. The move is best read as a strategic de-risking bet rather than a verdict on Tata Projects' competence: Micron is spreading execution risk across contractors for the most capital-sensitive chip project in India's history, and it tells us that India's semiconductor buildout is entering the phase where delivery speed matters more than political optics.
Last verified: 2026-07-30 · Micron selected L&T for phase two construction · Phase one is in commercial production (inaugurated Feb 28, 2026) · Meinhardt retains design; Turner International adds project consultancy · Phase two scope expected to match phase one's 500,000 sq ft cleanroom scale · Pricing/timeline details may shift — last checked July 2026.
What happened with Micron's Sanand contractor switch?
Micron appointed L&T as the general contractor to build phase two of its semiconductor ATMP facility in Sanand, Gujarat, according to people familiar with the development reported on July 29, 2026. Tata Projects—the contractor that built phase one—was not retained for the second phase after operational delays created friction between the two sides. L&T was reportedly always a top contender and has now bagged the contract. (Economic Times, DQ India)
The supporting team remains largely stable. Singapore-based Meinhardt, which worked on phase one, stays on to design phase two. Turner International is expected to handle project consultancy. One semiconductor consultant framed the switch not as a knock on Tata Projects but as "a strategic execution call"—splitting phases across different builders so that no single contractor's timeline becomes a bottleneck for the entire $2.75 billion project. (ICICI Direct)
Why did Micron move away from Tata Projects for phase two?
Micron and Tata Projects ran into operational delays during phase one that created friction in the working relationship. The phase one timeline itself told the story: Micron originally projected completion in 2024, but the facility did not begin commercial production until early 2026—a delay of roughly a year. By mid-2025, reports surfaced that Micron had invited bids for phase two with L&T and KEC International among the contenders, signaling that Tata Projects was not a lock for the follow-on. (Firstpost)
The decision does not appear to be a performance-rebate on Tata Projects alone. Tata Projects is a serious EPC player—it formally announced its collaboration with Micron in September 2023 for the Sanand facility and delivered the cleanroom shell that now houses one of the world's largest raised-floor cleanrooms at 500,000 square feet. (Tata Projects press release) The switch is more plausibly about Micron's internal risk model: when a single $2.75 billion project is the flagship of an entire national industrial policy, you do not let one contractor own both phases.
| Factor | What happened | Why it matters |
|---|---|---|
| Phase one delivery | Built by Tata Projects; completed and in commercial production as of Feb 2026 | Cleanroom shell delivered; timeline slipped ~1 year from original 2024 target |
| Friction trigger | Operational delays during phase one execution | Firstpost reports Micron began evaluating other vendors "over the past two months" before the bid |
| Phase two contractor | L&T appointed as general contractor | L&T was "always a top pick" per DQ India sources |
| Retained partners | Meinhardt (design), Turner International (project consultancy) | Continuity in design intent; new eyes on project management |
| Framing | "Strategic execution call" per one semiconductor consultant | Not a Tata Projects performance verdict—risk diversification |
How is the $2.75 billion project funded?
The total project cost of $2.75 billion is split across three parties: Micron's own $825 million (approximately 30%), the Indian central government covering 50% of the total project cost under the Modified ATMP Scheme, and the Gujarat state government providing an additional 20% in incentives. This 70% government subsidy structure was formalized through India's Semiconductor Mission (ISM) framework. Micron confirmed the investment structure in its original announcement, noting that government support would "help fund the project and facilitate access to essential semiconductor infrastructure and resources." (Micron Investor Relations, Firstpost)
The fiscal support structure is defined under the Government of India's Modified Scheme for Semiconductor Assembly, Testing, Marking, and Packaging (ATMP)/Outsourced Semiconductor Assembly and Test (OSAT), which offers up to 50% fiscal support on a pari-passu basis. (PIB / India Semiconductor Mission)
What this means: Micron is deploying only 30 cents of its own capital per dollar of plant capacity. The Indian taxpayer is underwriting the bulk of the risk. That structure makes execution speed a national-interest variable, not just a Micron project-management concern—which is precisely why a contractor switch at this stage is more than a procurement footnote.
What is the scale of phase one and phase two?
Phase one features more than 500,000 square feet of cleanroom space, making it one of the world's largest single-floor assembly and test cleanrooms and one of the largest raised-floor cleanrooms globally. The facility is ISO 9001:2015 certified and has begun commercial production. Micron expects to assemble and test tens of millions of chips at the Sanand site in 2026, scaling to hundreds of millions in 2027. (Micron Investor Relations — opening announcement, India Semiconductor Mission, CRN Asia)
Phase two is expected to match phase one's scale—a second 500,000 sq ft block of cleanroom space. Design work is reportedly underway as of July 2026, with construction set to begin once phase one is fully wrapped up. The facility processes DRAM and NAND wafers sourced from Micron's global manufacturing network into finished ball grid array (BGA) integrated circuit (IC) packages, memory modules, and solid-state drives. (Economic Times)
| Metric | Phase One | Phase Two (Expected) |
|---|---|---|
| Tuple | Built by Tata Projects | L&T appointed as general contractor |
| Cleanroom space | 500,000+ sq ft | Match phase one scale |
| Status | Commercial production (Feb 2026) | Design underway; construction after phase one wraps |
| Output target (2026) | Tens of millions of chips | Not yet ramped |
| Output target (2027) | Hundreds of millions of chips | TBD |
| Certification | ISO 9001:2015 | To be determined |
Where does this project fit in India's semiconductor mission?
Micron's Sanand ATMP facility was the first project approved under India's Semiconductor Mission (ISM). Phase one was inaugurated by Prime Minister Narendra Modi on February 28, 2026, marking India's first commercial semiconductor assembly and test operation. At the inauguration, Micron presented its first shipment of made-in-India memory modules to Dell Technologies for laptops manufactured in India. (PM India, PIB)
As of December 2025, 10 semiconductor projects with a combined investment of ₹1.60 lakh crore had been approved across six states under earlier phases of the programme. By July 2026, the independent ISM project tracker at fidus.one counted 13 approved projects, with 3 operational, 3 under construction, and 7+ in approved or pre-build stages. (India Semiconductor Mission, Fidus ISM tracker, PIB Budget document)
The list of operational and under-construction projects includes three Sanand-based OSAT facilities clustered around Micron (Kaynes Semicon, CG Semi, and Micron itself), Tata's own ATMP in Assam and fab at Dholera, Gujarat, and advanced packaging projects in Odisha. This clustering matters: Sanand is becoming a de facto semiconductor assembly cluster, and Micron's phase two expansion—now under L&T's watch—is the anchor that validates the cluster strategy.
Related reading: For a deeper look at how the Kaynes Semicon facility fits into ISM 2.0, see our analysis of Kaynes Semicon's wafer-fab leap under ISM 2.0. For the compound semiconductor angle in India, see why Agnit and IISc may matter more than the big silicon fabs.
What does the L&T selection signal about India's chip buildout?
The L&T appointment signals three things worth paying attention to.
First, risk diversification is becoming standard practice for Indian semiconductor gigaprojects. The Micron project carries national-policy weight—Prime Minister Modi personally inaugurated phase one and tied it to the broader "Make in India" narrative. When a single project carries that much political and economic capital, no owner wants execution concentrated in one contractor's hands. Switching contractors between phases is a basic de-risking move in megaproject procurement; India's chip buildout is now mature enough to practice it.
Second, the contractor pool for semiconductor-grade cleanrooms is still very thin. L&T is one of the few Indian EPC firms with the scale and balance-sheet depth to take on a semiconductor cleanroom build. When Firstpost reported in February 2025 that Micron was inviting bids, only two firms were named as serious contenders: L&T and KEC International. That is a narrow field for a project this size, and it is a structural constraint on how fast India can stand up more chip facilities in parallel. (Firstpost)
Third, phase one delays were real but not disqualifying. Tata Projects delivered the facility approximately a year behind the original 2024 target, yet the cleanroom is operational and producing chips. The delay did not kill the project—but it did reshape how Micron thinks about phase two execution. As one semiconductor consultant told DQ India, the switch was "a strategic execution call, rather than any reflection on Tata Projects' actual performance." (DQ India)
For a broader context on how India's manufacturing ambitions stack up against the timeline, see our analysis of India's $1.5 trillion manufacturing bet by 2035. And for a look at how a different Asian semiconductor powerhouse is approaching the same AI-driven chip-demand cycle, see South Korea's $950 billion AI hardware backbone strategy.
What is the Sanand facility actually making?
The Sanand ATMP facility converts advanced DRAM (Dynamic Random-Access Memory) and NAND flash wafers—sourced from Micron's global fabrication network—into finished memory and storage products. The output includes ball grid array (BGA) integrated circuit packages, memory modules, and solid-state drives (SSDs). The facility is an assembly, testing, marking, and packaging (ATMP) operation, which means it sits at the back end of the semiconductor supply chain: wafers come in, finished chips and modules go out. (Micron Investor Relations, India Semiconductor Mission projects page)
ATMP/OSAT facilities are operationally distinct from front-end wafer fabs (which actually print circuits onto silicon). India's ISM portfolio reflects this distinction: the Micron Sanand plant, Kaynes Semicon, and CG Semi are all back-end ATMP/OSAT operations, while Tata Electronics' Dholera fab (partnering with Taiwan's PSMC) is India's first front-end commercial logic fab project, targeting 28nm initially. (Fidus ISM tracker)
The Micron facility is projected to create up to 5,000 new direct jobs and 15,000 community jobs over the course of both phases. (Micron Investor Relations)
What this means for you
If you are a builder or operator in the semiconductor supply chain: The L&T appointment confirms that phase two is real and moving—design work is underway, and the construction window opens once phase one is fully wrapped. If you sell materials, equipment, services, or talent into the cleanroom-construction or ATMP tooling market, the second 500,000 sq ft build is your pipeline. L&T's Buildings & Factories order book just got a semiconductor-grade entry; expect them to need partners who understand cleanroom protocols, raised-floor installation, and chemical-delivery systems.
If you are watching India's industrial policy: The switch is a small but honest signal that even India's flagship chip project is not immune to execution-cycle friction. The good news is that the response—switching contractors—is exactly what a maturing megaproject ecosystem should do. The risk to watch is the narrow contractor pool: if only two or three firms can build these cleanrooms, throughput across all 13 approved ISM projects will bottleneck on construction capacity, not on policy or capital.
If you are assessing India as a semiconductor manufacturing destination: Phase one is operational, producing chips, and shipping to customers like Dell. The cluster effect around Sanand (Micron + Kaynes + CG Semi) is real. But the phase one delay and the contractor switch are reminders that India's chip story is still in the "growing pains" chapter, not the "mission accomplished" chapter. Price your timeline assumptions accordingly.
FAQ
Q: Who is building phase two of Micron's Gujarat semiconductor plant? A: Larsen & Toubro (L&T) has been appointed as the general contractor for phase two of Micron's $2.75 billion ATMP facility in Sanand, Gujarat, as reported on July 29, 2026. (Economic Times)
Q: Why did Micron switch from Tata Projects to L&T? A: Operational delays during phase one created friction between Micron and Tata Projects. The switch is described by industry sources as a strategic execution call to diversify contractor risk, not as a verdict on Tata Projects' performance. (DQ India)
Q: How much is the Indian government paying for the Micron plant? A: The $2.75 billion total cost is split between Micron's own $825 million (~30%), the Indian central government covering 50% under the Modified ATMP Scheme, and the Gujarat state government providing an additional 20% in incentives. (Micron Investor Relations)
Q: When did Micron's Sanand phase one start commercial production? A: Phase one began commercial production in February 2026, inaugurated by Prime Minister Narendra Modi on February 28, 2026. The facility is ISO 9001:2015 certified and shipped its first made-in-India memory modules to Dell Technologies. (PM India)
Q: How many semiconductor projects has India approved under its semiconductor mission? A: As of December 2025, 10 projects with a combined investment of ₹1.60 lakh crore had been approved across six states. By July 2026, an independent tracker counted 13 approved projects, with 3 operational. (PIB, Fidus ISM tracker)
Q: What is the cleanroom scale at Micron's Sanand facility? A: Phase one features more than 500,000 square feet of cleanroom space, making it one of the world's largest single-floor assembly and test cleanrooms and one of the largest raised-floor cleanrooms globally. Phase two is expected to match that scale. (CRN Asia)
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