For three years, asking "who builds the best AI chip?" had a one-word answer: Nvidia. CUDA's 18-year head start, NVLink's 900 GB/s interconnect, and near-universal framework support made the GPU maker unassailable. In July 2026, AMD fired back with Helios — a 72-GPU rack-scale system that rewrites the competitive landscape, not by matching Nvidia's compute, but by out-memorizing it.
The stakes are staggering. OpenAI signed a 6-gigawatt deal in October 2025. Metamatched with another 6 GW in February 2026. Anthropic committed 2 GW and a $5 billion equity stake in July 2026. Combined, that's 14 gigawatts of AMD GPU capacity — enough to power a small country — and the clearest signal yet that the GPU war is no longer a one-horse race.
Here's what changed, how Helios actually compares to Nvidia's Vera Rubin NVL72, and what it means for anyone planning AI infrastructure spend in 2026 or 2027.
Helios by the Numbers
AMD's Helios is not a concept slide or a roadmap promise. It is a concrete reference design that OEMs and ODMs are building right now, with engineering samples shipping in the second half of 2026 and mass production beginning in the second quarter of 2027.
The headline specifications:
| Specification | AMD Helios (72x MI455X) | Nvidia Vera Rubin NVL72 |
|---|---|---|
| Accelerators | 72 MI455X (CDNA 5) | 72 Rubin GPUs |
| Total HBM4 Memory | 31.1 TB | 20.7 TB |
| Aggregate FP4 | 2.9 ExaFLOPS | 3.6 ExaFLOPS |
| Aggregate FP8 | 230 PetaFLOPS | 180 PetaFLOPS |
| HBM per GPU | 432 GB | 288 GB |
| Memory Bandwidth per GPU | 19.6 TB/s | ~13 TB/s |
| Scale-up Bandwidth (per GPU) | 3.6 TB/s (UALink) | 3.6 TB/s (NVLink 6.0) |
| Rack Footprint | Double-wide (ORW) | Single rack |
| Power | ~140 kW | 120–130 kW |
Sources: AMD Helios product page, AMD MI400 Series specifications, and Nvidia Vera Rubin NVL72 published specs, as reported by The Next Web, Introl Blog, and GeniusTechLab at Advancing AI 2026.
The key takeaway: AMD leads on memory capacity by 50% per rack (31 TB vs 20.7 TB) and on FP8 training throughput, while Nvidia maintains an edge in raw FP4 inference compute and dramatically superior interconnect bandwidth at the system level.
Why Memory Wins Matter More Than FLOPS
Here's the part that most spec-sheet comparisons miss.
The bottleneck in frontier AI has shifted. In 2024, the constraint was training — companies couldn't get enough GPUs. In 2026, models are trained and deployed; the constraint is serving them to hundreds of millions of users in real time. That serving workload is memory-bound, not compute-bound.
The MI455X's 432 GB of HBM4 per GPU — 2.25 times the 192 GB on Nvidia's B200 — is not an incremental improvement. It is a generational leap that changes what fits on a single device. Large language models with trillion-parameter architectures, long-context inference workloads, and mixture-of-experts setups all benefit from larger memory pools because they reduce the need to shard models across multiple GPUs and spill traffic across the fabric.
When your model hits out-of-memory errors on a B200's 192 GB, the MI455X's 432 GB isn't a nice-to-have. It's the difference between running on one rack or running on three.
This is why Anthropic — a company that serves Claude to millions of users daily — chose AMD. Tom Brown, Anthropic's Co-Founder and Chief Compute Officer, framed the decision around matching workloads to hardware: "Running across a diversified range of hardware lets us map the right workloads to the right hardware."
The UALink Bet: Breaking the NVLock-in
The most strategically significant part of the Helios announcement is not the GPU. It is the interconnect.
Nvidia's NVLink has been the single most durable competitive moat in the AI accelerator market. It delivers unmatched scale-up bandwidth — up to 1.8 TB/s per GPU on Blackwell, doubling to 3.6 TB/s on Vera Rubin's NVLink 6.0. But it is proprietary, end-to-end controlled by Nvidia, and the reason that buying one Nvidia GPU often means buying eight, plus the NVSwitch fabric to connect them.
AMD's answer is UALink — an open standard developed by the UALink Consortium, which includes AMD, Google, Intel, Meta, and Microsoft. Helios delivers 260 TB/s of aggregate intra-rack bandwidth through this fabric, with 43 TB/s of scale-out bandwidth between racks via Ultra Ethernet Consortium specifications.
The strategic argument is simple: data centre operators who don't want to be locked into a single vendor's interconnect will pay for the flexibility. Helios uses the OCP Open Rack Wide (ORW) form factor — an open standard submitted to the Open Compute Project by Meta. Nvidia's NVL72 uses a proprietary rack design.
Is UALink faster than NVLink today? No. NVLink's 259 TB/s aggregate system bandwidth dwarfs UALink's 16 TB/s at the rack level. But AMD's bet is that open standards win over time, the same way Ethernet beat proprietary networking fabrics, and the consortium backing — five of the largest hyperscalers — gives that bet credibility.
If you want to understand the long-term infrastructure implications of vendor lock-in versus open standards, our AI Infrastructure Supercycle analysis covers how these deals reshape procurement strategy.
EPYC Venice: The CPU That Coordinates the Rack
Helios is not just GPUs. Each rack pairs 72 MI455X accelerators with sixth-generation AMD EPYC "Venice" CPUs, built on the Zen 6 core architecture and manufactured on TSMC's 2nm process technology — the first high-performance computing product in the industry to reach volume production on 2nm.
The CPU choice matters more than it seems. In the agentic AI era, where AI systems autonomously chain multiple inference calls, coordinate tools, and manage multi-step workflows, the CPU handles scheduling, data movement, storage, security, and system orchestration across the data centre. The GPU does the matrix math; the CPU runs everything else.
AMD offers two Venice configurations for different workload tiers:
- AI host node variant: 8 compute chiplets, each with 12 cores running at up to 5 GHz — designed to feed GPUs efficiently. AMD claims it outperforms x86 competition by 1.8x on tokens per second.
- Agentic sandbox variant: 256 cores, 512 threads (8 chiplets × 32 cores each) — the highest compute density in the industry, delivering up to 2x the agents per watt versus the nearest x86 competitor.
AMD's own benchmarks show the EPYC 9005 series delivering 82% higher performance than Intel Xeon 6980P across CPU-centric stages of the agentic AI pipeline. These are company benchmarks and will require independent verification, but the architectural logic is sound: agentic workloads need many threads for parallel agent execution and high single-core speed for sequential scheduling — Venice addresses both with its dual-configuration approach.
AMD is also positioning Venice as a direct competitor to Nvidia's Arm-based Vera CPU, claiming up to 20% higher single-core performance and 2.2x greater throughput in selected workloads. This matters because Nvidia's Vera Rubin platform pairs Rubin GPUs with Vera CPUs — if AMD's host CPU is stronger, the Helios rack has a coordination advantage even where its raw GPU compute lags.
The Gigawatt Customers: Who Bought What
The customer roster is what makes Helios more than a spec-sheet exercise. AMD has locked in 14 gigawatts of GPU deployment commitments, each backed by multi-year, multi-generation agreements:
OpenAI (6 GW, announced October 2025): The first 1 GW of MI450 Series GPUs begins deployment in the second half of 2026. The partnership spans Triton, Gluon, LLVM, and ROCm optimization — OpenAI feeds AMD early insight into where models are heading, and AMD translates that into silicon. At Advancing AI 2026, OpenAI confirmed it has had access to Helios systems for "several months" and is actively optimizing GPT-class workloads on the platform. Read our deeper analysis of OpenAI's $750 billion infrastructure strategy for context on how this fits their broader compute buildout.
Meta (6 GW, announced February 2026): Uses a custom AMD Instinct GPU based on the MI450 architecture, optimized for Meta's specific workloads. Meta co-developed the Helios rack architecture through the Open Compute Project. AMD issued Meta a performance-based warrant for up to 160 million shares, vesting as shipment milestones are achieved. Mark Zuckerberg said: "This is an important step for Meta as we diversify our compute. I expect AMD to be an important partner for many years to come."
Anthropic (2 GW + $5B equity, announced July 2026): The deepest partnership of the three. AMD will invest up to $5 billion in Anthropic, tied to deployment milestones. The engineering collaboration centers on using Claude to optimize workloads for AMD Instinct GPUs and accelerating ROCm development. Dr. Lisa Su called it "a deeper tie between the two companies." Anthropic's existing MI355X deployment expands to MI455X-based Helios systems, with the first gigawatt beginning in the first half of 2027.
Microsoft: Adopted Helios for Azure's large-scale inference infrastructure, expanding an existing AMD deployment that spans EPYC CPUs and Instinct GPUs across data processing, chip design, and AI inference workloads.
In total, OpenAI and Meta have booked 12 gigawatts of capacity. Add Anthropic's 2 GW, and AMD has customer commitments that could generate tens of billions of dollars in chip sales beginning in 2027. For perspective, AMD's Q1 FY26 data center revenue was $5.78 billion — these deals represent a step-change in scale.
AMD + Cerebras: Specialized Inference for Ultra-Low Latency
At Advancing AI 2026, AMD also announced a technical partnership with Cerebras Systems that adds a new dimension to the competitive map. The two companies are building a disaggregated inference solution that pairs Helios's high-throughput GPU compute with Cerebras's Wafer-Scale Engine for ultra-fast token generation.
Think of it as the best of both worlds: Helios handles the heavy-lifting prefill (processing the prompt), and Cerebras's wafer-scale chip handles the decode (generating output tokens at speeds no GPU can match). The joint solution is expected to be available through Cerebras Cloud in the second half of 2026.
This mirrors a broader industry trend toward workload specialization. Nvidia made a similar move by acquiring Groq for approximately $20 billion in December 2025 and launching the Groq 3 LPU at GTC 2026 — a dedicated inference chip that splits prefill (handled by Vera Rubin GPUs) from decode (handled by Groq 3 LPUs). Both AMD and Nvidia are converging on the same architectural insight: the era of one-chip-does-everything is ending.
The Vera Rubin Counter: Nvidia Is Not Standing Still
AMD's announcements do not happen in a vacuum. Nvidia's Vera Rubin platform, announced earlier in July 2026, targets the same workload tier with a different architectural philosophy.
Vera Rubin delivers approximately 50 petaFLOPS of FP4 inference per GPU — higher than the MI455X's 40 PFLOPS — and claims 10x lower inference token costs through a seven-chip codesign architecture. NVLink 6 doubles Blackwell's interconnect speed, delivering 22 TB/s of HBM4 bandwidth per GPU. Cloud instances are expected to appear 2–3 months ahead of MI400 availability, giving Nvidia a time-to-market edge.
The comparison is nuanced:
- Nvidia wins on: raw FP4 petaFLOPS per GPU (50 vs 40), system-level interconnect bandwidth (259 TB/s vs 16 TB/s via UALink), ecosystem maturity (CUDA remains the default, ROCm has closed the gap significantly but not fully), and time to market.
- AMD wins on: memory capacity per rack (31 TB vs 20.7 TB), FP8 training throughput (230 PFLOPS vs 180 PFLOPS), open-standard fabric (UALink vs proprietary NVLink), power per GPU (~1.0–1.2 kW planning band), and supplier diversification.
- It's a wash on: scale-up bandwidth per GPU (both at 3.6 TB/s), HBM4 generation (both use HBM4), and rack-level deployment model.
Nvidia also maintains a massive software advantage. CUDA has an 18-year head start. PyTorch, vLLM, llama.cpp, and Stable Diffusion all work on AMD via ROCm, but compatibility gaps remain in edge cases — TensorRT is NVIDIA-only, multi-GPU NVLink is more mature than Infinity Fabric, and ROCm documentation still trails CUDA. For frontier pretraining labs, NVIDIA remains the safer, lower-friction choice. For enterprise inference at scale, AMD is now a credible alternative.
What This Means for AI Infrastructure Buyers
If you're planning AI infrastructure spend in 2026 or 2027, the Helios announcement changes the procurement calculus in five concrete ways:
1. You now have leverage in Nvidia negotiations
Even if you buy Nvidia, the existence of a credible alternative gives you bargaining power. For the last three years, Nvidia could charge whatever it wanted because there was noPlan B. Now there is. Expect Nvidia pricing to soften on large deals — not because Nvidia is generous, but because AMD is real.
2. Memory capacity is the new battleground
Don't compare GPUs by TFLOPS alone. Compare usable HBM per GPU and per rack, sustained bandwidth under your target batch shape, and bisection-limited all-to-all throughput for your tensor-parallel group size. The MI455X's 432 GB per GPU changes what models fit on a single device, which changes how many GPUs you need, which changes your total cost. For a model that needs 25–30 TB of memory, a single Helios rack can handle it; NVL72 requires tensor parallelism across multiple systems.
3. Open standards vs. proprietary lock-in is a real decision
UALink backed by Google, Intel, Meta, and Microsoft could become the default interconnect for multi-vendor AI clusters by 2027. If you value supplier diversity and standards-based scale-out, Helios is architecturally aligned with that future. If you value maximum performance today and are comfortable with single-vendor stacks, NVLink delivers.
4. CPU choice matters in agentic AI
The EPYC Venice CPU is not a commodity component — it's the coordinator. With up to 256 Zen 6 cores and 512 threads, it's purpose-built for agentic workloads that need many parallel threads for agent execution. Nvidia's Vera CPU is Arm-based and optimized for its own ecosystem. Evaluate the CPU alongside the GPU, not as an afterthought.
5. Real benchmarks beat spec sheets
Every number in this article — from AMD, Nvidia, and third-party sources — should be treated as marketing until you see your own checkpoint and inference trace on production firmware. AMD's comparisons with Nvidia are internal. Nvidia's comparisons are internal. The only numbers that matter are the ones from your workloads on your data. Run a full training step with your real data loader, checkpoint, and eval loop. Include a failure injection test (kill a node) to measure recovery time.
For a framework on evaluating AI infrastructure readiness before committing to any stack, see our guide on AI Infrastructure Readiness Gap.
The ROCm Question: Can AMD's Software Catch Up?
Hardware wins specs sheets; software wins deployments. The persistent question for AMD is whether ROCm can close the gap with CUDA fast enough to make Helios deployable without extensive hand-tuning.
Progress is real but incomplete. AMD made its first-ever MLPerf Training submission in June 2025 — a significant milestone. ROCm 7.0, released alongside Helios, improves PyTorch integration, adds better support for FP4 and FP6 data types, and includes enhanced compilation tools. OpenAI is actively optimizing Triton and LLVM for AMD GPUs. Anthropic's Claude is being used to optimize ROCm workloads.
But gaps remain. TensorRT has no AMD equivalent. Multi-GPU communication libraries (NCCL for Nvidia, RCCL for AMD) differ in maturity. Documentation density and community size still favor CUDA. Framework support is full for PyTorch, vLLM, and llama.cpp, but ComfyUI and specialized training frameworks have fewer AMD tutorials and more edge cases.
The practical implication: if your stack is PyTorch-based inference and training with mainstream models, AMD works. If you're using specialized NVIDIA-only tools or need the broadest compatibility, check specifically before committing.
Our comparison of LLM cost optimization with model-agnostic architecture explores how to avoid lock-in at the application layer regardless of your hardware choice.
Timeline: When Does This Ship?
Understanding when these systems are actually available — not announced — is critical for planning:
- MI455X engineering samples: Second half of 2026 (in production now, per Phoronix)
- Helios mass production: Q2 2027, expanding through first half of 2027
- OpenAI first 1 GW deployment: Second half of 2026, accelerating through 2027
- Meta first 1 GW deployment: Second half of 2026
- Anthropic first 1 GW deployment: First half of 2027
- MI430X (sovereign AI variant): Expected 2027
- MI500 series: In development, 2027 timeframe, targeting another significant performance leap
Nvidia's Vera Rubin NVL72 cloud instances are expected to appear 2–3 months ahead of MI400 availability, giving Nvidia a time-to-market edge that could matter for workloads starting in late 2026.
Sovereign AI: The Third Front
AMD also announced a sovereign AI variant of Helios, pairing Venice-X CPUs with MI430X accelerators for nations and organizations that need to keep AI workloads within their borders. Korea's Ministry of Science and ICT announced a strategic partnership with AMD to support its sovereign AI ecosystem. This is a market Nvidia's export-control complications have made harder to serve, giving AMD a structural advantage in countries that want full control over their AI infrastructure.
The MI430X is estimated to have 8.7x better hardware-based FP64 performance than Nvidia Vera Rubin — a specification that matters less for commercial AI and more for national HPC and scientific computing workloads.
The Bottom Line
Is AMD catching up to Nvidia? The honest answer is: it depends on the workload.
For frontier pretraining labs that need maximum raw compute, minimum friction, and the broadest software ecosystem, Nvidia remains the safer choice. Vera Rubin's higher FP4 throughput, superior interconnect bandwidth, and CUDA lock-in still win where single-vendor optimization matters most.
For enterprise inference at scale — where memory capacity, cost per token, and supplier diversification matter — AMD has built the first credible alternative in a decade. The MI455X's 2.25x memory advantage, the Helios rack's 50% larger memory pool, UALink's open-standard promise, and 14 gigawatts of customer commitments make this the first AI chip decision in years where the answer isn't obvious.
The GPU war is no longer a one-horse race. It's a two-horse race with a third lane opening for specialized inference silicon (Cerebras, Groq). For the first time in a decade, infrastructure buyers have real leverage, real alternatives, and real decisions to make.
Sources: AMD Newsroom (July 22–23, 2026), AMD IR press releases, OpenAI strategic partnership announcement (October 2025), Nvidia GTC 2026 and Vera Rubin platform announcement, Cerebras Systems joint announcement at Advancing AI 2026, MLPerf Training v5.0 results (June 2025), The Next Web, GeniusTechLab, Introl Blog, SemiAnalysis, HPCwire, Wccftech, and AMD product specification pages. All specifications are sourced from manufacturer-published data and should be verified against independent benchmarks before procurement decisions.
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