India's ₹1.27 lakh crore ($15 billion) semiconductor gamble will probably pay off — but not the way most people think. It will not make India the next Taiwan, and the Tata-PSMC fab at Dholera alone will not transform the country into a chip superpower. What it can do, and is already starting to do, is build enough of a packaging, compound-semiconductor, and design ecosystem to capture meaningful value from a global chip market projected to surpass $750 billion — making India a trusted alternative in the segments where it has a genuine footing, rather than a thin-margin competitor fighting incumbents at their own game.
Last verified: 2026-08-06 · India has 3 units in commercial production, 12 approved projects worth ₹1.64 lakh crore, and the Semicon 2.0 programme (₹1,27,500 crore) structuring the next phase around six pillars · Semicon India 2026 runs Sept 17–19 at Yashobhoomi, New Delhi · Volatile facts ahead — pricing, timelines, and project statuses change often.
What Has India Actually Built So Far?
As of August 2026, three semiconductor facilities have commenced commercial production under the India Semiconductor Mission (ISM): Micron's assembly and test plant in Sanand, Gujarat; Kaynes Semicon's packaging facility in Sanand; and CG Semi's OSAT operation in Sanand — a three-company joint venture between CG Power (Murugappa Group), Japan's Renesas Electronics, and Thailand's Stars Microelectronics. (New Indian Express, Jan 2026; Sector Signals, 2026; The Tech Portal, Jul 2026)
The broader portfolio approved under ISM Phase 1 includes 12 manufacturing projects with a cumulative investment exceeding ₹1.64 lakh crore, comprising one silicon fabrication plant, one silicon carbide (SiC) fab, an integrated gallium nitride (GaN) Micro LED display fabrication facility, and nine semiconductor packaging units. (Swarajya, Jul 2026; PIB, Jul 2026)
The headline project — the Tata Electronics-PSMC fab at Dholera, Gujarat — is India's first commercial silicon wafer fabrication plant. It involves a ₹91,000 crore investment in partnership with Taiwan's Powerchip Semiconductor Manufacturing Corp (PSMC), targeting 28nm–110nm process nodes on 300mm wafers at a capacity of 50,000 wafer starts per month. Construction began in March 2024. First test wafers are targeted for late 2026, with full commercial production ramp expected around 2028. Tata Electronics signed a framework agreement with ASML for DUV lithography equipment supply in May 2026. (Tata Electronics; Fidus, 2026; fabs.pranaykotas.com tracker, Jul 2026)
What Is Semicon 2.0 and What Does It Change?
Semicon 2.0 is the next phase of India's semiconductor programme, approved by the Union Cabinet on July 15, 2026, with a budget outlay of ₹1,27,500 crore. It scales up the original India Semiconductor Mission (ISM 1.0), which was approved in December 2021 with ₹76,000 crore. The new programme is structured around six pillars: (PIB, Jul 2026; DD India, Jul 2026; Swarajya, Jul 2026)
| Pillar | Focus | What exists already |
|---|---|---|
| 1. Chip design | IP creation, system-level design for strategic + commercial use | 105 startups developing chips; 24 DLI projects funded |
| 2. Equipment & materials | Incentivise domestic manufacturing of chemicals, gases, equipment | Largely greenfield; high import dependence today |
| 3. Fabrication | Attract more silicon fabs, compound semiconductor fabs, display fabs | Tata-PSMC Dholera fab under construction; SiC and GaN fabs approved |
| 4. Packaging (ATMP/OSAT) | Advanced assembly, testing, marking, packaging | 9 packaging units approved; 3 in commercial production |
| 5. R&D | Advance beyond 28–110nm nodes; next-gen technologies | Academic research programmes being established |
| 6. Talent | Clean-room operations, fab construction, manufacturing skills | 315 universities training ~68,000 students on EDA tools |
The critical difference from Phase 1 is scope: ISM 1.0 was primarily about getting manufacturing plants approved and under construction. Semicon 2.0 extends to the full value chain — equipment, materials, research, advanced packaging, and deeper design support. The government explicitly recognised that building a fab without a domestic supply chain of chemicals, gases, and equipment creates a fragile ecosystem dependent on foreign inputs. (ET Edge Insights, Jul 2026)
Can India Sustain a Fab at Profitable Utilization?
A semiconductor fab is economically viable only when it runs at high utilization — typically above 85–90%. You cannot run a fab on subsidies forever. India's domestic semiconductor demand is growing (the electronics sector is now valued at ₹13 lakh crore and is India's third-largest export category), but the question is whether enough of that demand translates into chip orders for Indian-made silicon, rather than imported chips assembled into products in India. (Sarkaritel, Jun 2026; Safir News, Jun 2026)
The honest answer: domestic demand alone cannot sustain the Dholera fab at 50,000 wafer starts per month. The facility must plug into the global supply chain. That means securing international customers — automotive OEMs, industrial electronics companies, telecom infrastructure providers — who will place volume orders at competitive cost and cycle time. The technology partnership with PSMC provides process know-how, but PSMC only partly fills the gap; India still lacks indigenous fab expertise at the level Taiwan, South Korea, and Japan have built over decades.
The more realistic near-term path runs through packaging and compound semiconductors, not cutting-edge silicon nodes:
Packaging as a beachhead. Assembly, testing, marking, and packaging (ATMP/OSAT) requires lower capital expenditure and less process complexity than wafer fabrication. It is where India has moved fastest — three of the first three operational units are packaging facilities, not fabs. The strategic question is whether India can use this entry point to climb into advanced packaging (chiplets, 3D integration, heterogeneous packaging), which is where margins and differentiation live, or whether it gets stuck competing on cost in mature packaging — a lower-margin service business.
Compound semiconductors as a strategic niche. India's approved portfolio includes silicon carbide (SiC), gallium nitride (GaN), and discrete power semiconductor projects. These serve electric vehicles, telecom infrastructure, energy systems, industrial automation, and defence — sectors where India has genuine domestic demand, and where the technology barrier is lower than competing with TSMC at 3nm. NITI Aayog's June 2026 roadmap explicitly identifies compound semiconductors, advanced packaging, and wide-bandgap materials (SiC, GaN, diamond, Ga₂O₃) as areas where India can "leapfrog parts of the global value chain." (NITI Aayog, Jun 2026)
Why Hasn't India's Design Talent Produced More Chip Companies?
India has one of the world's largest semiconductor design workforces — estimated at 20% of the world's chip design engineers, with thousands of chips designed domestically every year. (ISM/DLI official site) But the IP largely belongs to multinationals: Qualcomm, Intel, Nvidia, and others employ Indian engineers to design chips whose ownership leaves the country.
The Design Linked Incentive (DLI) Scheme has supported 24 design projects, given 105 startups and MSMEs access to advanced EDA tools (from Cadence, Synopsys, Siemens EDA, and Keysight), and trained approximately 68,000 students across 315 universities. 23 design tapeouts have been completed at various foundries. (DLI official portal; SemiconHunt, 2026)
Three structural barriers explain why the talent hasn't translated into globally significant Indian chip companies:
- Product-market fit. Many early DLI-funded startups built chips for military or strategic applications — low-volume by nature. Semiconductor economics demand volume; you need consumer or enterprise use cases with mass demand.
- Funding depth. The first DLI scheme offered an average of ~$2 million per project, which does not cover the non-recurring engineering (NRE) cost of a modern chip design through tapeout and production validation. A single tapeout at an advanced node can cost $5–15 million.
- Post-silicon ecosystem. Designing a chip is only step one. You need post-manufacturing validation, packaging, qualification, and characterization — capabilities that barely existed in India before the current wave of packaging facilities. Semcon 2.0's expanded scope is partly designed to close this gap.
What Should You Watch to Know If the Strategy Is Working?
The three metrics that will distinguish a real semiconductor industry from a subsidised one by 2030:
Domestic demand creation. Are Indian OEMs, ODMs, and system integrators placing volume orders for domestically manufactured chips at market prices (not subsidised procurement)? Without local customers defining spec requirements and pulling product through the supply chain, the fabs are just export-oriented contract manufacturers with no moat.
Supplier localization. How much of the chemicals, gases, substrates, and equipment come from domestic sources versus imports? India cannot own the complete supply chain — no single country does — but it needs complementary local capability sufficient to keep costs competitive and reduce geopolitical vulnerability. Realistically localisable: quartz/silica, many specialty chemicals and gases that already serve the pharma industry. Almost certainly not localisable in the near term: lithography equipment (ASML, Nikon, Canon).
Innovation and IP creation. How many fabless startups are building original chip IP — not just executing specs defined by someone else — and deploying it in commercial products with global customers? The DLI scheme set an initial target of 100 startups. The current count is 24 funded projects. The trajectory from 24 to 100 is the real scoreboard.
What Does This Mean for Builders and Businesses?
If you are building a company in India — in AI, automotive, IoT, telecom, energy, or industrial electronics — the semiconductor push opens three near-term opportunities:
- Design for Indian-made chips. As packaging facilities and the Dholera fab come online, there is an emerging market for companies that can define chip specifications from market use cases and place volume orders. Semiconductor startups that combine product vision with manufacturing access are the rarest and most valuable category.
- Supply chain participation. Every fab and packaging facility needs chemicals, gases, substrates, equipment services, clean-room construction, and precision logistics. Companies that can supply semiconductor-grade inputs — or adapt existing pharma-grade manufacturing to semiconductor specifications — are the fastest localisation wins.
- Talent arbitrage. India's design talent is abundant at the spec-execution level but scarce at the product-definition level. If you are a semiconductor engineer or leader with product-definition experience, the intersection of Indian manufacturing capacity and global demand is your highest-leverage position for the next five years.
For those looking at India's broader AI and tech infrastructure landscape, the semiconductor push compounds with other vectors — India's sovereign AI partner programmes for domestic model deployment, the AI-driven transformation of India's $315B IT industry, and state-level AI economy pushes like Tamil Nadu's $1.5 trillion ambition — to form a picture of a country building compute sovereignty from chips up to models. For enterprises evaluating in-country inference and data residency options, domestic semiconductor supply chains will eventually reduce hardware import dependence — though that is a 2028+ story, not a 2026 one.
How Does India's Semiconductor Push Compare Globally?
| Dimension | India (2026) | China | United States (CHIPS Act) | Taiwan |
|---|---|---|---|---|
| Total public outlay | ₹1,27,500 cr (~$15B) across 2 phases | ~$150B+ (IC fund + local subsidies) | $52B (CHIPS Act) | Government-supported through industrial policy + TSMC ecosystem |
| Leading node capability | 28nm (Tata-PSMC, under construction) | 7nm (SMIC, limited volume) | 4nm (Intel/TSMC Arizona, in progress) | 2nm (TSMC, R&D) |
| Commercial production | 3 packaging units | Mature at scale | Ph1 fabs under construction | Full ecosystem, leading edge |
| Design IP strength | 24 DLI-funded startups, IP mostly with MNCs | Growing fabless ecosystem (HiSilicon, etc.) | Strong fabless (Nvidia, AMD, Qualcomm IP) | TSMC dominant in foundry; MediaTek in design |
| Timeline to ecosystem depth | 2028–2030+ | Already deep at mature nodes | 2026–2028+ | Decades of accumulated depth |
The comparison is not flattering for India's near-term position, but it is also not the right comparison. India is not trying to beat TSMC at 2nm. It is trying to build enough ecosystem depth in mature-node silicon, compound semiconductors, and packaging to become a trusted alternative supplier — the strategy China pursued in the 2010s and the US is now pursuing through the CHIPS Act.
What Is the Semicon India 2026 Event?
SEMICON India 2026 will take place from September 17–19, 2026 at Yashobhoomi (India International Convention & Expo Centre) in New Delhi, organised by the India Semiconductor Mission under MeitY in partnership with SEMI and IESA. The event's theme is "Building Trusted and Resilient Semiconductor Ecosystems" and will feature global semiconductor CEOs, a PM roundtable, an exhibition (booth space reportedly 95% sold), startup showcases, student hackathons, and workforce development programmes. (ISM official site; CGI Reunion, Govt of India; Vaisala events page)
For anyone tracking India's semiconductor trajectory, this event is a signal checkpoint — the venue for measuring whether the ecosystem momentum is translating into concrete customer agreements, technology partnerships, and startup deployment.
What This Means for You
India's semiconductor strategy is past the announcement phase and in the execution phase, but the hard part — connecting individual projects into a globally competitive ecosystem — has just begun. If you are in a position to participate, the window between 2026 and 2028 is when supply chain relationships, customer contracts, and talent pipelines get established. After 2028, when the Dholera fab ramps to volume production, the companies that are already embedded in the ecosystem will have the advantage.
Related reading
- India chip industry roadmap to 2035
- India chip design ecosystem
- first commercial chip shipments from Sanand
FAQ
Q: What is the total investment committed under India's semiconductor programme? A: India's Union Cabinet approved Semicon 2.0 on July 15, 2026, with a budget outlay of ₹1,27,500 crore (~$15 billion), building on the original India Semiconductor Mission (ISM 1.0) which had ₹76,000 crore. Separately, 12 manufacturing projects worth over ₹1.64 lakh crore have been approved under ISM, including the ₹91,000 crore Tata-PSMC fab at Dholera. (PIB, Jul 2026)
Q: Which semiconductor facilities are already producing chips in India? A: As of 2026, three units are in commercial production: Micron's assembly and test facility in Sanand, Kaynes Semicon's packaging plant, and CG Semi's OSAT operation — all in Gujarat. Tata Electronics' Assam packaging facility is expected to begin pilot production in mid-2026. The Tata-PSMC silicon fab in Dholera targets first test wafers in late 2026 and full production by ~2028. (New Indian Express, Jan 2026)
Q: Can India compete with Taiwan or South Korea in semiconductors? A: Not at advanced nodes — not in this decade. India's most realistic path to global relevance runs through mature-node silicon (28nm+), compound semiconductors (SiC, GaN) for EVs, telecom, and defence, and packaging/ATMP services. NITI Aayog's 2026 roadmap explicitly identifies these segments plus advanced packaging as areas where India can leapfrog rather than compete head-on with TSMC or Samsung at 2nm. (NITI Aayog, Jun 2026)
Q: What are the six pillars of Semicon 2.0? A: (1) Chip design and IP creation, (2) Equipment and materials manufacturing, (3) Fabrication facilities (silicon fabs, compound semiconductor fabs, display fabs), (4) Advanced packaging (ATMP/OSAT), (5) R&D for next-generation nodes, and (6) Talent development across clean-room operations, fab construction, and manufacturing skills. (Swarajya, Jul 2026)
Q: How many semiconductor design startups has India supported? A: Under the Design Linked Incentive (DLI) scheme, 24 design startups have received project funding, 105 companies have gained access to industry-standard EDA tools, and 23 chip tapeouts have been completed. Approximately 68,000 students have been trained across 315 universities. The target is to grow from 24 funded startups toward 100. (DLI official portal; SemiconHunt, 2026)
Q: When is the Semicon India 2026 conference? A: Semicon India 2026 runs September 17–19, 2026, at Yashobhoomi (India International Convention & Expo Centre) in New Delhi. It is organised by the India Semiconductor Mission under MeitY, in partnership with SEMI and IESA, under the theme "Building Trusted and Resilient Semiconductor Ecosystems." (ISM official site)
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